RF Signal Classification using Boolean Reservoir Computing on an FPGA

Networks of Boolean logic gates exhibiting complex dynamical behavior are promising reservoirs for hardware-accelerated reservoir computing. Using an FPGA, we explore the parameter space of both clocked and unclocked Boolean networks, and identify configurations that are suitable for information processing. We use an FPGA-based reservoir to process a subset of the DeepSig 2016 dataset, showing classification accuracy using logistic regression competitive with a state-of-the-art convolutional neural network, achieved with a fraction of the trainable parameters.