conference-paper

Parallel Conflict-Free Ordered Access Memory Based Programmable Hardware Accelerator Structure

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Abstract

Programmable hardware accelerator structure and information processing method based on a new model of computation with parallel conflict-free ordered data and command access is proposed in a paper. The advantages of the proposed hardware accelerator structure over traditional ones are highlighted.

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Publication details

DOI
10.1109/acitt.2019.8779928
OpenAlex
W2966031539
Document type
conference-paper
Language
EN
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