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Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System

  • ACM Transactions on Architecture and Code Optimization
  • Association for Computing Machinery
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Abstract

We consider software-hardware acceleration of K-means clustering on the Intel Xeon+FPGA platform. We design a pipelined accelerator for K-means and combine it with CPU threads to assess performance benefits of (1) acceleration when data are only accessed from system memory and (2) cooperative CPU-FPGA acceleration. Our evaluation shows that the accelerator is up to 12.7×/2.4× faster than a single CPU thread for the assignment/update step of K-means. The cooperative use of threads and FPGA is roughly 1.9× faster than CPU threads alone or the FPGA by itself. Our approach delivers 4×–5× higher throughput compared to existing offload processing approaches.

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Publication details

DOI
10.1145/3406114
OpenAlex
W3080250604
Document type
article
Language
EN
Source
ACM Transactions on Architecture and Code Optimization
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