ملف الباحث
Kailash Prasad
ورقة واحدة في مجموعة PaperMetrix
المنشورات
أوراق هذا المؤلف
-
VeriBench: Benchmarking Large Language Models for Verilog Code Generation and Design Synthesis
2025
In the rapidly advancing field of hardware design, Electronic Design Automation (EDA) tools can be significantly improved using Machine Learning. This study evaluates the efficacy of various Large Language Models (LLMs) for automating Electronic Design …