conference-paper
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Abstract
Co-location of latency-critical services with best-effort batch jobs is commonly adopted in production systems to increase resource utilization. Although memory and CPU isolation have been extensively studied, we find Simultaneous Multi-Threading (SMT) technology imposes non-trivial interference on memory access which jeopardizes efficient co-location and performance assurance of latency-critical services. However, there is not an existing metric to quantitatively measure and lacks a deterministic approach to tackle SMT interference on memory access.
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Publication details
- DOI
- 10.1145/3502181.3531464
- OpenAlex
- W4283380581
- Document type
- conference-paper
- Language
- EN
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