FPGA/MATLAB Hardware in the Loop Testbed for Stochastic Artificial Neural Networks

Abstract Abstract—This paper presents a Hardware in the Loop (HWIL) testbed for evaluating a Stochastic Artificial Neural Network (SANN). The SANN is implemented in a Field Programmable Gate Array (FPGA), and this testbed allows test data to be generated on a computer using MATLAB, and sent to the FPGA SANN over a Universal Asynchronous Receiver/Transmitter (UART) interface. Initial hardware results are presented.