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Fast Bit-Parallel Binary Multipliers Based on Type-I Pentanomials

  • IEEE Transactions on Computers
  • Institute of Electrical and Electronics Engineers
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Abstract

In this paper, a fast implementation of bit-parallel polynomial basis (PB) multipliers over the binary extension field GF(2m) generated by type-I irreducible pentanomials is presented. Explicit expressions for the coordinates of the multipliers and a detailed example are given. Complexity analysis shows that the multipliers here presented have the lowest delay in comparison to similar bit-parallel PB multipliers found in the literature based on this class of irreducible pentanomials. In order to prove the theoretical complexities, hardware implementations over Xilinx FPGAs have also been performed. Experimental results show that the approach here presented exhibits the lowest delay with a balanced Area x Time complexity when it is compared with similar multipliers.

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Publication details

DOI
10.1109/tc.2017.2778730
OpenAlex
W2775673945
Document type
article
Language
EN
Source
IEEE Transactions on Computers
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