conference-paper

Design and Study of Circuits Using Reversible Logic

  • 2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC)
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Abstract

In VLSI systems design, reversible Logic has gained importance for Reducing power. This paper focuses on designing of sequential circuits and reducing the number of constant inputs - CI and the garbage outputs - GO. Basic reversible gates are used to build sequential circuits. D Flip flop, Latch and RAM cell are developed. All circuits are VHDL coded on Xilinx tool, simulated and verified. Reduction in CI of more than 33 percent and GO of more than 80 percent is achieved. This is achieved by properly reusing the outputs for configuring the constant input of other gates.

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Publication details

DOI
10.1109/icesc51422.2021.9532793
OpenAlex
W3202246114
Document type
conference-paper
Language
EN
Source
2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC)
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