An analog Very Large Scale Integrated circuit design of Back Propagation Neural Networks

All the modern technologies in digital systems are slowly converting in to the analog implementation especially for the fault tolerance and low power consumption. But the analog implementation of parallel computation with ANN (Artificial Neural Network) in real time implementation is not an easy task in all aspects. This paper mainly focuses on the implementation of Neural Network Architecture (NNA) with on chip learning in analog VLSI (Very Large Scale Integration). Back Propagation Neural Network (BPN) algorithm is designed and simulated in analog domain by using Tanner EDA tool.