Design Flow of Blowfish Symmetric-Key Block Cipher on FPGA

Cryptography is an essential topic for modern digital systems. In the past two decades, FPGA-based encryptions has proved to be effective. Through this project, we explore a cryptographic application of FPGAs by implementing the Blowfish symmetric-key block cipher on a Xilinx ZedBoard. The motivation behind this is to explore how FPGAs can be used to accelerate the performance of a symmetric-key block cipher. Our goal is to compare the performance of a hardware implementation of Blowfish to a software implementation. Our Blowfish block cipher is implemented in VHDL and is functionally verified against a Python reference model. The design as a whole supports user input of various keys for key initialization along with full encryption and decryption functionality. Furthermore, the design was successfully synthesized and implemented on the ZedBoard FPGA. A performance evaluation was conducted between the hardware implementation and a Blowfish library running in Python by comparing the time it takes to perform the key initialization and encrypt/decrypt operation.