Implementation of post-processing for phase-polarization combined modulation QKD system

According to the characteristics of the combined modulation Quantum Key Distribution (QKD) system, a postprocessing method for phase-polarization combined modulation is designed and implemented, which is consist of sifting, parameter estimation, error reconciliation and privacy amplification. In this paper, we focuses on the research of error reconciliation. Firstly, the error reconciliation algorithm is given. On account of it, the hardware implementation scheme is designed and simulated on the Field Programmable Gate Array (FPGA) hardware platform. The error reconciliation algorithm mentioned above is based on Low Density Parity Check Code (LDPC) in IEEE802.16e standard. A fast iteration method is used in encoding scheme, on the basis of the check-matrix with sparsity as well as quasi-dual-diagonal structure, it reduces the quantity of logic resource and complexity of encoding and improves the encoding speed relatively. The encoder is implemented in FPGA with a 576-bit code length and 1/2 code rate. From the two aspects of functional and performance test, the system performance is higher than other implementations.