Shayan Shahramian

30.5 A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS

2019

Analog mixed-signal (AMS) receivers for 50+Gb/s PAM-4 offer lower power than ADC-DSP receivers [1]-[3]. Those using DFEs [2]-[3] suffer from relatively high power consumption due to the large number of latches needed in PAM-4 speculative …