conference-paper Open access

DigitalNizam: Shaping the Future of Pakistani Elections through Secure Field-Programmable Gate Array-Based Voting Solutions

Research footprint

At a glance

Citations
0
References
13
Comments
0
Paper overview

Öz

This paper represents the ways in which a secure and reliable voting machine could be implemented using hardware descriptive language, which in this case is Verilog. In order to emphasize security, the proposed design is implemented in two ways. The first variant is a basic version comprising some basic safety protocols; however, the subsequent variant is a safer kind of FPGA-based voting machine. Furthermore, concrete illustration is presented using the Vivado and Artix-7-based FPGA Basys-3. Finally, the obtained conclusions seem to be encouraging to a certain extent, as, evidently, the system provides robust and assured voting, along with minimizing latency and power consumption. In addition to this, this design could be utilized as a starting point for the development of superior voting systems utilizing FPGAs in the future.

Record transparency

Publication details

DOI
10.3390/engproc2023046044
OpenAlex
W4387975862
Document type
conference-paper
Language
EN
Last metadata update
Community

Comments

Oturum Açın to join the discussion.

  1. No comments yet. Start the discussion.